Typically, in a metal oxide semiconductor (MOS) transistor, a thin layer of silicon dioxide is grown in the gate region. The oxide functions as a dielectric whose thickness is chosen specifically to allow induction of a charge in the channel region under the oxide. The gate controls the flow of current through the device. In sub-0.5.mu.m technologies, ultra-thin gate oxides are used for ultra-large-scale-integration (ULSI, more than 10 million transistors per chip).
Also, highly integrated memory devices, such as dynamic-random-access-memories (DRAMs), require a very thin dielectric film for the data storage capacitor. To meet this requirement, the capacitor dielectric film thickness will be below 2.5 nm of SiO.sub.2 equivalent thickness. Use of a thin layer of a material having a higher relative permittivity, e.g. Ta.sub.2 O.sub.5, in place of the conventional SiO.sub.2 or Si.sub.3 N.sub.4 layers is useful in achieving desired performance.
A chemical vapor deposited (CVD) Ta.sub.2 O.sub.5 film can be used as a dielectric layer for this purpose, because the dielectric constant of Ta.sub.2 O.sub.5 is approximately three times that of a conventional Si.sub.3 N.sub.4 capacitor dielectric layer. However, one drawback associated with the Ta.sub.2 O.sub.5 dielectric layer is undesired leakage current characteristics. Accordingly, although Ta.sub.2 O.sub.5 material has inherently higher dielectric properties, Ta.sub.2 O.sub.5 typically may produce poor results due to leakage current. For example, U.S. Pat. No. 5,780,115 to Park et al., discloses the use of Ta.sub.2 O.sub.5 as the dielectric for an integrated circuit capacitor with the electrode layer being formed of titanium nitride (TiN). However, at temperatures greater than 600.degree. C., this layered structure has a stability problem because the titanium in the TiN layer tends to reduce the Ta.sub.2 O.sub.5 of the dielectric layer into elemental tantalum.